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Senior IC Verification Engineer

  • Location: Cambridge, Cambridgeshire
  • Sector: ASIC / IC Design
  • Job type: Permanent
  • Job reference: NAD21137/16
  • Salary: £60,000 + Competetive Benefits
This vacancy has now expired.

Job description

This company, a high-profile Cambridge technology business, design highly complex IC's (from specification and architecture through to production test) that are used by literally millions of end users (consumers) worldwide.
Due to expansion they currently require several Senior IC Verification Engineers to join their R&D team in Cambridge.

This is a fantastic opportunity to join our world class IC team, designing, validating and implementing our innovative products which combine our cutting edge video, graphics and low latency networking IP.

The company are a very successful, highly profitable Software and Chip company who own the very lucrative technology space that they work in. They are rapidly expanding, building their complex IP into new, world leading Graphics, Video / AR / VR products. They are developing exciting, working, world leading technology where their competitors are visibly failing. As a result of this success, they are looking for a number of skilled Senior to Principal IC Design Engineers to work on new concepts, technologies and products.

You will be involved in many (or all) aspects of the verification process including, functional verification, synthesis and timing closure, to silicon validation and production test, with optimisation and enhancement of device level architecture are also being key aspects of these roles.

This challenging and varied role will involve verification of both IPs and SoCs.

The work will cover all aspects of the verification flow from verification planning and development of environments through to testcase writing, gathering coverage and maintaining regression suites. Our verification engineers have a wide range of tools at their disposal from simulation and formal methods through to FPGAs and will use each as appropriate. With a philosophy of continuous improvement every engineer is encouraged to propose enhancements to our flow and contribute to the advancement of our verification methodology.

To excel in these roles, we look for experience of the following verification techniques:

> SystemVerilog/UV
> Verification planning and closure
> Assertions
> Formal verification
> Low power/UPF
> Python
> Experience of standard bus, network and display interfaces e.G. USB, Ethernet, PCIe, DisplayPort, are always a bonus.

This is a fantastic opportunity to join an innovative technology company in the heart of Cambridge. They are the largest independent chip / semiconductor company in Cambridge and offer a raft of positive benefits, including not having the ‘big' company politics that you might experience at very large, global, US centric companies.

For further information on this Senior Verification Engineer vacancy (or other similar engineering job opportunities) please call Nick Drain on 01582 878837 or email Nick on NDrain@redlinegroup.Com
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