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FPGA Design / Verification Engineer - London

  • Location: Old Street, Central London
  • Sector: Digital / FPGA
  • Job type: Permanent
  • Job reference: BP36873/1
  • Salary: £45,000 - £55,000 Basic + Benefits
This vacancy has now expired.

Job description


A leading Medical Electronics organisation based in Central London are seeking multiple skilled FPGA Design / Verification Engineer specialists to join their growing R&D facility. You will be involved in full life-cycle high-speed digital designs including specification, design, implementation, simulation and hardware verification, predominantly using VHDL. You will gain the opportunity to develop highly complex life-saving products for clients across the globe.

This role is commutable from Luton, Bedford, St Albans, Watford, Reading, Slough, Middlesex, Surrey and Greater London. They are easily accessible via the Northern line tube.

The successful FPGA Design / Verification Engineer will have the following skills:
> You will have a good understanding of complex high-speed FPGA design - ideally using VHDL and/or Verilog.
> Experience in design, development and verification.
> A good knowledge of functional RTL development would be beneficial but not essential.
> Previous exposure to ASIC development would be beneficial but not essential.
> Software scripting ability, ideally using Python would be beneficial.
> Candidates should be degree qualified within a relevant electronic engineering discipline.

This is a fantastic opportunity to have a huge impact within a company with a great working environment and fantastic progression on offer.

For more information please call Bhavesh Patel on 01582 878812.

To APPLY for this FPGA Design / Verification Engineer please send CV to bpatel@redlinegroup.Com (referencing BP36873/1).
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